
C O B R A   1 8 8 2 P    INTEGRAL
                                                      Native|  Translation
                                                      ------+-----+-----+-----
Form                 PCMCIA TYPE III       Cylinders        |  977|     |
Capacity form/unform    85/      MB        Heads           3|   10|     |
Seek time   / track  18.0/ 8.0 ms          Sector/track     |   17|     |
Controller           PCMCIA                Precompensation
Cache/Buffer            32 KB LOOK-AHEAD   Landing Zone
Data transfer rate    2.500 MB/S int       Bytes/Sector      512
                      6.000 MB/S ext
Recording method     RLL 1/7                        operating  | non-operating
                                                  -------------+--------------
Supply voltage     5 V          Temperature *C         5 55    |    -40 70
Power: sleep          0.1 W     Humidity     %        10 90    |
       standby        0.4 W     Altitude    km    -0.305  3.048|        12.192
       idle           0.9 W     Shock        g       100       |    500
       seek           1.5 W     Rotation   RPM      3571
       read/write     1.5 W     Acoustic   dBA        34
       spin-up        2.0 W     ECC        Bit   AUTOMA.ERROR CORR.
                                MTBF         h     150000
                                Warranty Month
Lift/Lock/Park     YES          Certificates     CSA,IEC380,IEC435,IEC950,U...

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INTEGRAL COBRA 1882P  PRODUCT MANUAL 10000856 REV. A  8/7/92

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  +----------------------------------------+  1









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                      J   U   M   P   E   R   S
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INTEGRAL COBRA 1882P  PRODUCT MANUAL 10000856 REV. A  8/7/92


 Customer Options
 ----------------
 The Model 1882P can operate as a single drive or in a dual drive
 configuration. As shipped from the factory, the drive is set to
 indicate single drive or master. To utilize the drive as a master,
 the interface +MST/-SLV signal should be connected to VCC or left
 open. To configure a drive for use as a second drive or slave, the
 interface +MST/-SLV signal should be shorted to ground.


 Interface Description
 ---------------------
 Pin    Signal
 07     -CS0
 42     -CS1
 17     VCC
 51     VCC
 55     +MST/-SLV
 62     -DASP
 63     -PDIAG
 58     -RESET

 All signal levels are TTL compatible. A logic "1" is > 2.0 volts. A
 logic "0" is from 0.00 volts to .70 volts. All logic 0 active signals
 are prefixed with a "-" designation. All logic 1 active are prefixed
 with a "+" designation.


 Interface Connector Pin Assignment
 ----------------------------------
  +---+---+--------------------------+
  |Pin|I/O|PCMCIA  Memory  Signal    |
  +---+---+--------------------------+
  | 01|   |GND     Ground            |
  +---+---+--------------------------+
  | 02|I/O|D3      Data Bit 3        |
  +---+---+--------------------------+
  | 03|I/O|D4      Data Bit 4        |
  +---+---+--------------------------+
  | 04|I/O|D5      Data Bit 5        |
  +---+---+--------------------------+
  | 05|I/O|D6      Data Bit 6        |
  +---+---+--------------------------+
  | 06|I/O|D7      Data Bit 7        |
  +---+---+--------------------------+
  | 07|I  |CS0-    Chip select       |
  +---+---+--------------------------+
  | 08|   |                          |
  +---+---+--------------------------+
  | 09|   |                          |
  +---+---+--------------------------+
  | 10|   |                          |
  +---+---+--------------------------+
  | 11|   |                          |
  +---+---+--------------------------+
  | 12|   |                          |
  +---+---+--------------------------+
  | 13|   |                          |
  +---+---+--------------------------+
  | 14|   |                          |
  +---+---+--------------------------+
  | 15|   |                          |
  +---+---+--------------------------+
  | 16|O  |+IRQ                      |
  +---+---+--------------------------+
  | 17|I  |Vcc                       |
  +---+---+--------------------------+
  | 18|   |                          |
  +---+---+--------------------------+
  | 19|   |                          |
  +---+---+--------------------------+
  | 20|   |                          |
  +---+---+--------------------------+
  | 21|   |                          |
  +---+---+--------------------------+
  | 22|   |                          |
  +---+---+--------------------------+
  | 23|   |                          |
  +---+---+--------------------------+
  | 24|   |                          |
  +---+---+--------------------------+
  | 25|   |                          |
  +---+---+--------------------------+
  | 26|   |                          |
  +---+---+--------------------------+
  | 27|I  |A2      Address Bit 2     |
  +---+---+--------------------------+
  | 28|I  |A1      Address Bit 1     |
  +---+---+--------------------------+
  | 29|I  |A0      Address Bit 0     |
  +---+---+--------------------------+
  | 30|I/O|D0      Data Bit 0        |
  +---+---+--------------------------+
  | 31|I/O|D1      Data Bit 1        |
  +---+---+--------------------------+
  | 32|I/O|D2      Data Bit 2        |
  +---+---+--------------------------+
  | 33|O  |-IOCS16                   |
  +---+---+--------------------------+
  | 34|   |GND     Ground            |
  +---+---+--------------------------+
  | 35|   |GND     Ground            |
  +---+---+--------------------------+
  | 36|O  |CD1-    Card Detect       |
  +---+---+--------------------------+
  | 37|I/O|D11     Data Bit 11       |
  +---+---+--------------------------+
  | 38|I/O|D12     Data Bit 12       |
  +---+---+--------------------------+
  | 39|I/O|D13     Data Bit 13       |
  +---+---+--------------------------+
  | 40|I/O|D14     Data Bit 14       |
  +---+---+--------------------------+
  | 41|I/O|D15     Data Bit 15       |
  +---+---+--------------------------+
  | 42|I  |-CS1                      |
  +---+---+--------------------------+
  | 43|   |                          |
  +---+---+--------------------------+
  | 44|I  |-IOR                      |
  +---+---+--------------------------+
  | 45|I  |-IOW                      |
  +---+---+--------------------------+
  | 46|   |                          |
  +---+---+--------------------------+
  | 47|   |                          |
  +---+---+--------------------------+
  | 48|   |                          |
  +---+---+--------------------------+
  | 49|   |                          |
  +---+---+--------------------------+
  | 50|   |                          |
  +---+---+--------------------------+
  | 51|I  |Vcc                       |
  +---+---+--------------------------+
  | 52|   |                          |
  +---+---+--------------------------+
  | 53|   |                          |
  +---+---+--------------------------+
  | 54|   |VU Vendor Unique          |Must Open at the Host
  +---+---+--------------------------+
  | 55|I  |+MST/-SLV                 |
  +---+---+--------------------------+
  | 56|   |                          |
  +---+---+--------------------------+
  | 57|   |                          |
  +---+---+--------------------------+
  | 58|I  |RESET   Card Reset        |
  +---+---+--------------------------+
  | 59|O  |+IOCHRDY                  |
  +---+---+--------------------------+
  | 60|   |                          |
  +---+---+--------------------------+
  | 61|   |                          |
  +---+---+--------------------------+
  | 62|I/O|-DASP                     |
  +---+---+--------------------------+
  | 63|I/O|-PDIAG                    |
  +---+---+--------------------------+
  | 64|I/O|+DATA 8 Data Bit 8        |
  +---+---+--------------------------+
  | 65|I/O|D9      Data Bit 9        |
  +---+---+--------------------------+
  | 66|I/O|D10     Data Bit 10       |
  +---+---+--------------------------+
  | 67|O  |CD2-    Card Detect       |
  +---+---+--------------------------+
  | 68|   |GND     Ground            |
  +---+---+--------------------------+



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INTEGRAL COBRA 1882P  PRODUCT MANUAL 1000856 REV. A  8/7/92

 Notes On Installation
 =====================

 Installation direction
 ----------------------

     horizontally                           vertically
   +-----------------+             +--+                       +--+
   |                 |             |  +-----+           +-----+  |
   |                 |             |  |     |           |     |  |
 +-+-----------------+-+           |  |     |           |     |  |
 +---------------------+           |  |     |           |     |  |
                                   |  |     |           |     |  |
                                   |  |     |           |     |  |
 +---------------------+           |  +-----+           +-----+  |
 +-+-----------------+-+           +--+                       +--+
   |                 |
   |                 |
   +-----------------+

 Envelope and Mounting Drawings
 ------------------------------
 The features which allow greater shock and vibration tolerance
 include the dynamically loaded heads, a fully balanced rotary
 actuator, an inertial rotary actuator lock, and the low overall mass
 and weight of the drive and moving masses. The drive may be mounted
 in any attitude as long as it is properly retained. Adequate
 ventilation must also be provided to the drive to ensure reliable
 operation over the specified operating temperature range.


 Read/Write and Control Electronics
 ----------------------------------
 The Model 1882P has an integrated circuit attached to the flex
 circuit connected to the actuator arm and read/write heads to provide
 head selection, read preamplification, and write drive circuitry.


 Drive Mechanism
 ---------------
 The spin speed of the brushless DC drive spindle motor is maintained
 by using the motor in a synchronous mode. Energy stored in the
 spindle motor is used to unload the read/write heads upon drive power
 down.


 Head Positioning Mechanism
 --------------------------
 The read/write heads of the Model 1882P are directly attached to the
 actuator body which also supports the moving coil. The read/write
 heads are unloaded when the drive is spin down. This dynamically
 ramp loaded mechanism eliminates head/media contact associated with
 power cycling.


 Read/Write Heads and Disks
 --------------------------
 Data is recorded on two 48mm diameter disks using 70% MIG heads.


 Air filtration system
 ---------------------
 The Model 1882P HDA breathers through a high efficiency ambient
 filter. A high flow recirculative filter maintains a clean
 environment of better than class 100 for the heads and disk
 enclosure.



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                      F   E   A   T   U   R   E  S
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INTEGRAL COBRA 1882P  PRODUCT MANUAL 10000856 REV. A 8/7/92

 Enhanced Ruggedness
 -------------------
 Notebook, subnotebook and handheld computers used in mobile field
 applications must be capable of surviving a high degree of shock and
 vibration due to the often unpredictable and adverse conditions
 under which they are operated. Int gral's products address these
 requirements with a unique ramp loading mechanism for loading and un-
 loading the heads without touching the media, providing several
 benefits relating to ruggedness, reliability and low power
 consumption.

 Int gral's dynamic ramp loading technology represents an
 innovative approach to solving the environmental challenges of 1.8
 inch disk drive engineering by virtually eliminating the possibility
 of head slap in the power down state when the drive has been re-
 moved from the system. As a result, Int gral's drives can withstand
 greater than a 500G shock force in the non-operating mode. The
 benefits of ramp loading perhaps can best be illustrated by the
 start/stop specification of Int gral drives: a minimum of 250,000
 successful start/stops is guaranteed, while a conventional contact
 start/stop drive typically specifies only 40,000.


 Functional Description
 ----------------------
 The Model 1882P disk drive contains all the necessary mechanical
 and electronic components to interpret control signals, properly
 position the recording heads, read and write data, and maintain a
 contaminant free environment for the disks and recording heads.


 Key Features
 ------------

 - 1.8 inch form factor hard drive designed to meet the requirements
   of a PCMCIA TYPE III PC Card with the exception of dimensions T3.

 - Metallic packaging enclosure for ESD protection.

 - High capacity 1.8 inch providing the lowest power, lowest weight
   for the palm top environment.

 - Unique ramp loading mechanism for loading and unloading the disk
   heads during power downs and periods of inactivity which provides
   high shock durability and protection from stiction.

 - User invoked low power and power down modes for power sensitive
   applications.

 - High performance rotary voice coil actuator with embedded servo
   system.

 - Automatic actuator lock to protect against rotary shock.

 - On board controller with a single connector for AT interface and
   power. Additionally, the interface supports master/slave protocol.

 - 32K buffer cache with look ahead read.

 - Automatic error detection and correction.


 Diagnostic Routines
 -------------------
 Upon power up the microprocessor circuitry of the Model 1882P per-
 forms diagnostics. If an error is detected the drive will not come
 ready.


 Start Sequence
 --------------
 When power is applied to the drive, it will interrogate the -IDE1
 signal to determine is the slot is expecting an IDE drive. If
 this line is high during this interrogation, the drive will into a
 deep sleep mode. The only way to recover from this mode is to cycle
 the VCC input to the drive.

 During the deep sleep mode, if a -RESET signal occurs on the
 interface, a portion of the drive will wake up and then return to the
 deep sleep mode without effect on the interface signals.

 If the -IDE1 signal is low during the initial power on interrogation,
 the drive will spin up, do a servo calibration, perform internal
 diagnostics and come ready. This requires a total time of 5 seconds.
 Subsequent spin up from power saving modes do not require calibration
 so will be completed within 1.5 seconds.


 Translate Mode
 --------------
 Since the model 1882P does not have the same number of sectors on
 all cylinders, the drive always functions in the translate mode. Upon
 initial power up, the drive will default to 10 heads, 977 cylinders
 and 17 sectors per track. The initialize Parameters command can be
 used to change these values.


 Read Buffer
 -----------
 The Read Buffer command allows the host to read the current contents
 of the drive's sector buffer. Only the Command register is valid for
 this command. When this command is issued, the drive will set BSY set
 up the sector buffer for a read operation, set the DRQ bit, reset
 BSY, and generate an interrupt. The host may then read 512 bytes of
 data from the buffer.


 Write Buffer
 ------------
 The Write Buffer command allows the host to overwrite the contents of
 the drive's sector buffer with any data pattern desired. Only the
 Command register is valid for this command. When this command is
 issued, the drive will set up the sector buffer for a write operation
 and set the DRQ bit. The host may then write 512 bytes of data to the
 buffer.


 Identify Drive
 --------------
 The Identify command allows the host to receive parameter information
 from the drive. When the command is issued, the drive sets BSY,
 stores the required parameter information in the sector buffer, sets
 the DRQ bit, resets BSY, and generates an interrupt. The host may
 then read the information out of the buffer.


 Standby Commands
 ----------------
 These commands are available to immediately go into or out of the
 Standby mode, or to enable or disable a timer to automatically go to
 Standby. The timer will be running any time it is enabled and the
 drive is in the Active mode. When enabled, each disk access will
 reset the timer to its initial value. When the timer times out, the
 drive will enter the Standby mode. When the drive is in Standby, any
 disk access will cause the drive to go to the Active mode. When a
 command is given to enable the timer, the value in the Sector Count
 register specifies the number of 5 second increments to be used by
 the timer. The Standby commands follow:

 E0 The drive will immediately go to the Standby mode.

 E1 The drive will immediately go to Active mode.

 E2 The drive will immediately go to the Standby mode. If the Sector
    Count register is zero then the timer will be disabled. If the
    Sector Count register is non-zero the timer will be enabled and
    initialized with the Sector Count value.

 E3 The drive will immediately go to the Active mode. If the Sector
    Count register is zero then the timer will be disabled. If the
    Sector Count register is non-zero the timer will be enabled and
    initialized with the Sector Count value.

 E5 If the drive is in the Active mode, the Sector Count register will
    be set to hex FF. If the drive is in, going to, or recovering from
    the Standby mode, the Sector Count register will be set to hex 00.

 E6 The drive enters the Sleep mode. Either a software or hardware
    reset is required to recover from this mode. Upon receiving a
    reset, the drive will enter the Standby mode.

 In addition to the modes described above, if -IDE1 is not low after
 application of power, the drive will enter a deep sleep mode that
 requires a power cycle to reactivate the drive.


 Execute Drive Diagnostic
 ------------------------
 This command performs the internal diagnostic tests implemented by
 the drive. The drive sets BSY immediately upon receipt of the
 command, performs the diagnostic tests and saves the results. If
 unsuccessful, it sets its Error register as described below. The
 drive resets BSY, and generates an interrupt. The value in the Error
 register should be viewed as a unique 8 bit code and not as the
 single bit flags defined previosly. The registers are set to initial
 values except for the Error register if error.

 The table below details the codes in the Error register and a
 corresponding explanation. Additional codes may be implemented at the
 manufacturer's option.

 Error Code   Description
 ------------------------
    01        No error detected
    02        Controller error
    03        Sector buffer error
    05        Control processor error
    8X        Slave drive failed. If the slave fails diagnostics, the
              master will "OR" 80 hex with its own status and load
              that code in the Error register. If the slave passes or
              is not connected, the master will set bit 7 of the Error
              register to zero.


 Error Correction
 ----------------
 The Model 1882P performs internal error correction through the use of
 a polynominal capable of correcting one error burst with a maximum of
 22 bits, or two error bursts each with a maximum of 11 bits, per 512
 byte block. Single burst errors of 11 bits or less are corrected with
 no performance degradation.


